diff options
| author | 项小羽 <[email protected]> | 2022-06-08 15:55:11 +0000 |
|---|---|---|
| committer | 项小羽 <[email protected]> | 2022-06-08 15:55:11 +0000 |
| commit | 8077f13cc8d37d229ced48755084563ec94b94c6 (patch) | |
| tree | 79512db6f07ff44dfa726a3c5424ba9c37777f70 | |
| parent | a65aa2e681e1d9b3e21fb0025321419fc522e012 (diff) | |
clean and workable code here
| -rw-r--r-- | hw/intc/apic.c | 16 | ||||
| -rw-r--r-- | include/hw/i386/apic.h | 2 | ||||
| -rw-r--r-- | target/i386/tcg/misc_helper.c | 49 | ||||
| -rw-r--r-- | target/i386/tcg/seg_helper.c | 32 |
4 files changed, 21 insertions, 78 deletions
diff --git a/hw/intc/apic.c b/hw/intc/apic.c index e80295e84b..4a0545d8cb 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -949,16 +949,8 @@ int get_apic_id(DeviceState *dev){ APICCommonState *s = APIC(dev); return s->id; } -static void apic_deliver2(DeviceState *dev, uint8_t dest, uint8_t dest_mode, - uint8_t delivery_mode, uint8_t vector_num, - uint8_t trigger_mode) ; -void send_ipi(DeviceState *dev, uint8_t dest, uint8_t nv){ - qemu_mutex_lock_iothread(); - apic_deliver2(dev, dest, 0 ,APIC_DM_FIXED, nv, APIC_TRIGGER_EDGE); - qemu_mutex_unlock_iothread(); -} -static void apic_deliver2(DeviceState *dev, uint8_t dest, uint8_t dest_mode, +static void apic_deliver2(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) // delivery mode APIC_DM_FIXED dest mode: 0 , trigger_mode trigger: APIC_TRIGGER_EDGE { @@ -1006,4 +998,10 @@ static void apic_deliver2(DeviceState *dev, uint8_t dest, uint8_t dest_mode, apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); } +void send_ipi(uint8_t dest, uint8_t nv){ + qemu_mutex_lock_iothread(); + apic_deliver2(dest, 0 ,APIC_DM_FIXED, nv, APIC_TRIGGER_EDGE); + qemu_mutex_unlock_iothread(); +} + type_init(apic_register_types) diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h index e149b96dbf..dc88949e8e 100644 --- a/include/hw/i386/apic.h +++ b/include/hw/i386/apic.h @@ -19,7 +19,7 @@ void apic_init_reset(DeviceState *s); void apic_sipi(DeviceState *s); void apic_clear_eoi(DeviceState *s); // 改 int get_apic_id(DeviceState *dev); //改 -void send_ipi(DeviceState *dev, uint8_t dest, uint8_t nv); // 改 +void send_ipi(uint8_t dest, uint8_t nv); // 改 void apic_poll_irq(DeviceState *d); void apic_designate_bsp(DeviceState *d, bool bsp); int apic_get_highest_priority_irr(DeviceState *dev); diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c index 709c261539..8adeb6b61a 100644 --- a/target/i386/tcg/misc_helper.c +++ b/target/i386/tcg/misc_helper.c @@ -26,7 +26,7 @@ #include "hw/pci/msi.h" //改 #include "include/hw/i386/apic_internal.h" -static bool Debug = true; + /* * NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS @@ -79,24 +79,8 @@ void helper_rdtsc(CPUX86State *env) // ??? 读取时间相关的函数 env->regs[R_EDX] = (uint32_t)(val >> 32); } -// #include <time.h> -// unsigned long sended_time; -// static unsigned long now(void) { -// #ifdef __MACH__ -// return ((double)clock()) / CLOCKS_PER_SEC * 1e9; -// #else -// struct timespec ts; -// timespec_get(&ts, TIME_UTC); - -// return ts.tv_sec * 1e9 + ts.tv_nsec; -// #endif -// } #define UPID_ON 1 -// static bool former = false; -static bool current = false; -// static int timex = 0; -// static unsigned long cycle_time = 0; void helper_senduipi(CPUX86State *env ,int reg_index){ uint32_t uittsz = (uint32_t)env->uintr_misc; int uitte_index = env->regs[R_EAX]; @@ -108,17 +92,16 @@ void helper_senduipi(CPUX86State *env ,int reg_index){ raise_exception_ra(env, EXCP0D_GPF, GETPC()); } - int prot; CPUState *cs = env_cpu(env); // read tempUITTE from 16 bytes at UITTADDR+ (reg « 4); - uint64_t uitt_phyaddress = get_hphys2(cs, (env->uintr_tt>>3)<<3 , MMU_DATA_LOAD, &prot); + uint64_t uitt_phyaddress = get_hphys2(cs, (env->uintr_tt>>3)<<3 , MMU_DATA_LOAD, NULL); struct uintr_uitt_entry uitte; cpu_physical_memory_rw(uitt_phyaddress + (uitte_index<<4), &uitte, 16,false); // read tempUPID from 16 bytes at tempUITTE.UPIDADDR;// under lock - qemu_mutex_lock_iothread(); - uint64_t upid_phyaddress = get_hphys2(cs, uitte.target_upid_addr, MMU_DATA_LOAD, &prot); + qemu_mutex_lock_iothread(); + uint64_t upid_phyaddress = get_hphys2(cs, uitte.target_upid_addr, MMU_DATA_LOAD, NULL); struct uintr_upid upid; cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false); // tempUPID.PIR[tempUITTE.UV] := 1; @@ -134,33 +117,13 @@ void helper_senduipi(CPUX86State *env ,int reg_index){ sendNotify = false; } //write tempUPID to 16 bytes at tempUITTE.UPIDADDR;// release lock - // qemu_log("upidaddr is 0x%lx upid.puir is 0x%lx\n", uitte.target_upid_addr, upid.puir); cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true); - qemu_mutex_unlock_iothread(); + qemu_mutex_unlock_iothread(); - if(Debug && current){ - qemu_log("the ndst is %d\nnv is %d\n", upid.nc.ndst, upid.nc.nv); - DeviceState *dev = cpu_get_current_apic(); - int id = get_apic_id(dev); - qemu_log("the apic id is %d\n", id); - qemu_log("sendnotify: %d\n", sendNotify); - } if(sendNotify){ - if(current)qemu_log("direct sending\n"); - DeviceState *dev = cpu_get_current_apic(); - // int id = get_apic_id(dev); uint8_t realdst = upid.nc.ndst >> 8; - // qemu_log("\nthe apic id is %d\n", id); - // qemu_log("the ndst is %d real is %d\n\n", upid.nc.ndst, realdst); - // sended_time = now(); - // timex++; - // if(timex == 2){ - // timex = 0; - // qemu_log("XXXX %ld us\n", (now()- cycle_time)/1000); - // cycle_time = now(); - // } - send_ipi(dev, realdst, upid.nc.nv); + send_ipi(realdst, upid.nc.nv); } } diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c index 999c230d3b..229fb5b50a 100644 --- a/target/i386/tcg/seg_helper.c +++ b/target/i386/tcg/seg_helper.c @@ -945,18 +945,6 @@ static void helper_clear_eoi(CPUX86State *env){ /* 64 bit interrupt */ #define UINTR_UINV 0xec static int rrzero_count = 0; -// extern unsigned long sended_time; -// #include <time.h> -// static unsigned long now(void) { -// #ifdef __MACH__ -// return ((double)clock()) / CLOCKS_PER_SEC * 1e9; -// #else -// struct timespec ts; -// timespec_get(&ts, TIME_UTC); - -// return ts.tv_sec * 1e9 + ts.tv_nsec; -// #endif -// } static void do_interrupt64(CPUX86State *env, int intno, int is_int, int error_code, target_ulong next_eip, int is_hw) // 在用户态中断中 is_hw = 1 !!! ?????? { @@ -979,12 +967,10 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, bool send = false; if(intno == UINTR_UINV ){ recognized = true; - // unsigned long duration = now() - sended_time; - // qemu_log("receive %ld us\n", duration/1000); cpl = env->hflags & HF_CPL_MASK; - DeviceState *dev = cpu_get_current_apic(); - int id = get_apic_id(dev); if(!uif_enable(env)){ + DeviceState *dev = cpu_get_current_apic(); + int id = get_apic_id(dev); qemu_log("--uif zero,prev:%d | id:%d return\n",cpl, id); rrzero_count +=1; if(rrzero_count > 200){ @@ -994,17 +980,17 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, helper_clear_eoi(env); return; } - //查看当前的权级 - // qemu_log("in intrrupt apic id: %d \n", id); - // qemu_log("-|-| perv: %d \n", cpl); + if(cpl != 3){ + //查看当前的权级 + DeviceState *dev = cpu_get_current_apic(); + int id = get_apic_id(dev); helper_clear_eoi(env); qemu_log("perv: %d | id:%d not in user mode return\n", cpl,id); return; } - int prot; CPUState *cs = env_cpu(env); - uint64_t upid_phyaddress = get_hphys2(cs, env->uintr_pd, MMU_DATA_LOAD, &prot); + uint64_t upid_phyaddress = get_hphys2(cs, env->uintr_pd, MMU_DATA_LOAD, NULL); uintr_upid upid; cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false); upid.nc.status &= (~1); // clear on @@ -1014,12 +1000,8 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, send = true; } cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true); // write back - helper_clear_eoi(env); - - if(send)helper_rrnzero(env); - return; } |
