recode debug process

4 files changed, 102 insertions, 16 deletions

diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 1791f17d59..e80295e84b 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -29,7 +29,6 @@
 #include "hw/i386/apic-msidef.h"
 #include "qapi/error.h"
 #include "qom/object.h"
-#include <stdio.h>
 static bool Debug = true;
 #define MAX_APICS 255
 #define MAX_APIC_WORDS 8
@@ -950,11 +949,61 @@ int get_apic_id(DeviceState *dev){
     APICCommonState *s = APIC(dev);
     return s->id;
 }
-
+static void apic_deliver2(DeviceState *dev, uint8_t dest, uint8_t dest_mode,
+                         uint8_t delivery_mode, uint8_t vector_num,
+                         uint8_t trigger_mode) ;
 void send_ipi(DeviceState *dev, uint8_t dest, uint8_t nv){
     qemu_mutex_lock_iothread();
-    apic_deliver(dev, dest, 0 ,APIC_DM_FIXED, nv, APIC_TRIGGER_EDGE);
+    apic_deliver2(dev, dest, 0 ,APIC_DM_FIXED, nv, APIC_TRIGGER_EDGE);
     qemu_mutex_unlock_iothread();
 }
 
+static void apic_deliver2(DeviceState *dev, uint8_t dest, uint8_t dest_mode,
+                         uint8_t delivery_mode, uint8_t vector_num,
+                         uint8_t trigger_mode) // delivery mode APIC_DM_FIXED  dest mode: 0 , trigger_mode  trigger: APIC_TRIGGER_EDGE
+{
+    APICCommonState *s = local_apics[dest];
+    uint32_t deliver_bitmask[MAX_APIC_WORDS];
+    int dest_shorthand = (s->icr[0] >> 18) & 3;
+    APICCommonState *apic_iter;
+
+    switch (dest_shorthand) {
+    case 0:
+        apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode);
+        break;
+    case 1:
+        memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask));
+        apic_set_bit(deliver_bitmask, s->id);
+        break;
+    case 2:
+        memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask));
+        break;
+    case 3:
+        memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask));
+        apic_reset_bit(deliver_bitmask, s->id);
+        break;
+    }
+
+    switch (delivery_mode) {
+        case APIC_DM_INIT:
+            {
+                int trig_mode = (s->icr[0] >> 15) & 1;
+                int level = (s->icr[0] >> 14) & 1;
+                if (level == 0 && trig_mode == 1) {
+                    foreach_apic(apic_iter, deliver_bitmask,
+                                 apic_iter->arb_id = apic_iter->id );
+                    return;
+                }
+            }
+            break;
+
+        case APIC_DM_SIPI:
+            foreach_apic(apic_iter, deliver_bitmask,
+                         apic_startup(apic_iter, vector_num) );
+            return;
+    }
+
+    apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode);
+}
+
 type_init(apic_register_types)
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index 1913503676..709c261539 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -23,6 +23,7 @@
 #include "exec/helper-proto.h"
 #include "exec/exec-all.h"
 #include "helper-tcg.h"
+#include "hw/pci/msi.h"
 //改
 #include "include/hw/i386/apic_internal.h"
 static bool Debug = true;
@@ -78,17 +79,30 @@ void helper_rdtsc(CPUX86State *env) // ？？？ 读取时间相关的函数
     env->regs[R_EDX] = (uint32_t)(val >> 32);
 }
 
+// #include <time.h>
+// unsigned long sended_time;
+// static unsigned long now(void) {
+// #ifdef __MACH__
+// 	return ((double)clock()) / CLOCKS_PER_SEC * 1e9;
+// #else
+// 	struct timespec ts;
+// 	timespec_get(&ts, TIME_UTC);
+
+// 	return ts.tv_sec * 1e9 + ts.tv_nsec;
+// #endif
+// }
 
 #define UPID_ON 1
 // static bool former = false;
 static bool current = false;
+// static int timex = 0;
+// static unsigned long cycle_time = 0;
 void helper_senduipi(CPUX86State *env ,int reg_index){
-    qemu_log("reg_index:%d\n", reg_index);
     uint32_t uittsz = (uint32_t)env->uintr_misc;
     int uitte_index = env->regs[R_EAX];
     if(reg_index == 244){
         uitte_index = env->regs[R_R12];
-        qemu_log("read from r12, index :%d\n", uitte_index);
+        // qemu_log("read from r12, index :%d\n", uitte_index);
     }
     if (uitte_index > uittsz){
         raise_exception_ra(env, EXCP0D_GPF, GETPC());
@@ -103,6 +117,7 @@ void helper_senduipi(CPUX86State *env ,int reg_index){
     cpu_physical_memory_rw(uitt_phyaddress + (uitte_index<<4), &uitte, 16,false);
 
     // read tempUPID from 16 bytes at tempUITTE.UPIDADDR;// under lock
+        qemu_mutex_lock_iothread();
     uint64_t upid_phyaddress = get_hphys2(cs, uitte.target_upid_addr, MMU_DATA_LOAD, &prot);
     struct uintr_upid upid;
     cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false);
@@ -119,8 +134,9 @@ void helper_senduipi(CPUX86State *env ,int reg_index){
         sendNotify = false;
     }
     //write tempUPID to 16 bytes at tempUITTE.UPIDADDR;// release lock
+    // qemu_log("upidaddr is 0x%lx  upid.puir is 0x%lx\n", uitte.target_upid_addr, upid.puir);
     cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true);
-
+        qemu_mutex_unlock_iothread();
 
 
     if(Debug && current){
@@ -133,11 +149,18 @@ void helper_senduipi(CPUX86State *env ,int reg_index){
     if(sendNotify){
         if(current)qemu_log("direct sending\n");
         DeviceState *dev = cpu_get_current_apic();
-        int id = get_apic_id(dev);
+        // int id = get_apic_id(dev);
         uint8_t realdst = upid.nc.ndst >> 8;
-        qemu_log("the apic id is %d\n", id);
-        qemu_log("the ndst is %d real is %d\n", upid.nc.ndst, realdst);
-        send_ipi(cpu_get_current_apic(), realdst, upid.nc.nv);
+        // qemu_log("\nthe apic id is %d\n", id);
+        // qemu_log("the ndst is %d real is %d\n\n", upid.nc.ndst, realdst);
+        // sended_time = now();
+        // timex++;
+        // if(timex == 2){
+            // timex = 0;
+            // qemu_log("XXXX %ld us\n", (now()- cycle_time)/1000);
+            // cycle_time = now();
+        // }
+        send_ipi(dev, realdst, upid.nc.nv);
     }
 
 }
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 1de5d98c25..999c230d3b 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -888,9 +888,9 @@ static bool uif_enable(CPUX86State *env){
 
 void helper_stui(CPUX86State *env){
     switch_uif(env, true);
-    DeviceState *dev = cpu_get_current_apic();
-    int id = get_apic_id(dev);
-    qemu_log("xxxx  apic id is %d\n", id);
+    // DeviceState *dev = cpu_get_current_apic();
+    // int id = get_apic_id(dev);
+    // qemu_log("xxxx  apic id is %d\n", id);
 }
 
 
@@ -945,6 +945,18 @@ static void helper_clear_eoi(CPUX86State *env){
 /* 64 bit interrupt */
 #define UINTR_UINV 0xec
 static int rrzero_count = 0;
+// extern unsigned long sended_time;
+// #include <time.h>
+// static unsigned long now(void) {
+// #ifdef __MACH__
+// 	return ((double)clock()) / CLOCKS_PER_SEC * 1e9;
+// #else
+// 	struct timespec ts;
+// 	timespec_get(&ts, TIME_UTC);
+
+// 	return ts.tv_sec * 1e9 + ts.tv_nsec;
+// #endif
+// }
 static void do_interrupt64(CPUX86State *env, int intno, int is_int,
                            int error_code, target_ulong next_eip, int is_hw) // 在用户态中断中 is_hw = 1 !!! ???？？？
 {
@@ -967,6 +979,8 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
     bool send = false;
     if(intno == UINTR_UINV ){
         recognized = true;
+        // unsigned long duration = now() - sended_time;
+        // qemu_log("receive %ld us\n", duration/1000);
         cpl = env->hflags & HF_CPL_MASK;
         DeviceState *dev = cpu_get_current_apic();
         int id = get_apic_id(dev);
@@ -981,7 +995,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
             return;
         }
         //查看当前的权级
-        
+        // qemu_log("in intrrupt apic id: %d \n", id);
         // qemu_log("-|-| perv: %d \n", cpl);
         if(cpl != 3){
             helper_clear_eoi(env);
@@ -997,10 +1011,9 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
         if(upid.puir != 0){
             env->uintr_rr = upid.puir;
             upid.puir = 0; // clear puir
-            cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true); // write back
             send = true;
         }
-        cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true);
+        cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true);  // write back
 
         helper_clear_eoi(env);
         
diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c
index 62b319fdc9..b88854b7d9 100644
--- a/target/i386/tcg/sysemu/excp_helper.c
+++ b/target/i386/tcg/sysemu/excp_helper.c
@@ -21,6 +21,7 @@
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "tcg/helper-tcg.h"
+#include "qemu/log.h"
 
 #define PG_ERROR_OK (-1)