mesalab_git/zhangyang/uintr-linux-kernel.git - Repository for zhangyang/uintr-linux-kernel

Age	Commit message (Expand)	Author
2020-06-08	xtensa: implement flush_icache_user_range	Christoph Hellwig
2018-06-15	docs: Fix some broken references	Mauro Carvalho Chehab
2015-11-09	xtensa: support DMA to high memory	Max Filippov
2015-11-03	Revert "xtensa: cache inquiry and unaligned cache handling functions"	Max Filippov
2014-10-21	xtensa: nommu: don't build most of the cache flushing code	Max Filippov
2014-10-21	xtensa: nommu: provide __invalidate_dcache_page_alias stub	Max Filippov
2014-08-14	xtensa: implement clear_user_highpage and copy_user_highpage	Max Filippov
2014-01-14	xtensa: add SMP support	Max Filippov
2012-12-18	xtensa: clean up files to make them code-style compliant	Chris Zankel
2012-10-15	xtensa: reorganize SR referencing	Max Filippov
2010-05-01	xtensa: Fix FLUSH_DCACHE macro for some variants.	Chris Zankel
2009-11-26	block: add helpers to run flush_dcache_page() against a bio and a request's p...	Ilya Loginov
2009-06-22	xtensa: cache inquiry and unaligned cache handling functions	Oskar Schirmer
2009-04-02	xtensa: nommu support	Johannes Weiner
2008-11-06	xtensa: move headers files to arch/xtensa/include	Chris Zankel