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author项小羽 <[email protected]>2022-05-27 08:45:44 +0000
committer项小羽 <[email protected]>2022-05-27 08:45:44 +0000
commitc970088c9e39ed6738cdd7d6bde27cf707a37c23 (patch)
treeca14989903700ad4e9c9a66b30419799dc45bb56
parent0a63182b9181c49b6999ba0fbe34d5ed2e8c5aec (diff)
work half on direct send
-rw-r--r--hw/intc/apic.c7
-rw-r--r--include/hw/i386/apic.h1
-rw-r--r--target/i386/tcg/misc_helper.c42
-rw-r--r--target/i386/tcg/seg_helper.c23
4 files changed, 44 insertions, 29 deletions
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index d017c1cb2f..2a2a005d66 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -788,7 +788,7 @@ static void apic_mem_write(void *opaque, hwaddr addr, uint64_t val,
case 0x0a:
break;
case 0x0b: /* EOI */
- if(Debug && recognized)qemu_log("~ ~ ~ ~EOI called in mem wirte\n");
+ // if(Debug && recognized)qemu_log("~ ~ ~ ~EOI called in mem wirte\n");
apic_eoi(s);
break;
case 0x0d:
@@ -946,4 +946,9 @@ void apic_clear_eoi(DeviceState *dev){ // 改
apic_update_irq(s);
}
+int get_apic_id(DeviceState *dev){
+ APICCommonState *s = APIC(dev);
+ return s->id;
+}
+
type_init(apic_register_types)
diff --git a/include/hw/i386/apic.h b/include/hw/i386/apic.h
index f6d38d7736..be7bf6ae22 100644
--- a/include/hw/i386/apic.h
+++ b/include/hw/i386/apic.h
@@ -18,6 +18,7 @@ uint8_t cpu_get_apic_tpr(DeviceState *s);
void apic_init_reset(DeviceState *s);
void apic_sipi(DeviceState *s);
void apic_clear_eoi(DeviceState *s); // 改
+int get_apic_id(DeviceState *dev); //改
void apic_poll_irq(DeviceState *d);
void apic_designate_bsp(DeviceState *d, bool bsp);
int apic_get_highest_priority_irr(DeviceState *dev);
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index 888879d32d..1e9167b40d 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -23,7 +23,8 @@
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "helper-tcg.h"
-#include <stdio.h>
+//改
+#include "include/hw/i386/apic_internal.h"
static bool Debug = true;
/*
@@ -79,11 +80,16 @@ void helper_rdtsc(CPUX86State *env) // ??? 读取时间相关的函数
#define UPID_ON 1
-
+static bool former = false;
+static bool current = true;
void helper_senduipi(CPUX86State *env ,int reg_index){
- // CPUState *cs = env_cpu(env);
+ uint32_t uittsz = (uint32_t)env->uintr_misc;
int uitte_index = env->regs[R_EAX];
- if(Debug)printf("--------\nqemu:helper senduipi called receive regidx:%d, uipiindex: %d\n",reg_index,uitte_index);
+ if(Debug)qemu_log("--------\nqemu:helper senduipi called receive regidx:%d, uipiindex: %d\n",reg_index,uitte_index);
+ if (uitte_index > uittsz){
+ raise_exception_ra(env, EXCP0D_GPF, GETPC());
+ }
+
int prot;
CPUState *cs = env_cpu(env);
@@ -91,32 +97,44 @@ void helper_senduipi(CPUX86State *env ,int reg_index){
uint64_t uitt_phyaddress = get_hphys2(cs, (env->uintr_tt>>3)<<3 , MMU_DATA_LOAD, &prot);
struct uintr_uitt_entry uitte;
cpu_physical_memory_rw(uitt_phyaddress + (uitte_index<<4), &uitte, 16,false);
- if(Debug)printf("qemu: data of uitt \n| valid:%d | user_vec:%d | UPID address 0x%016lx \n",uitte.valid, uitte.user_vec,uitte.target_upid_addr);
+ if(Debug && former)qemu_log("qemu: data of uitt \n| valid:%d | user_vec:%d | UPID address 0x%016lx \n",uitte.valid, uitte.user_vec,uitte.target_upid_addr);
// read tempUPID from 16 bytes at tempUITTE.UPIDADDR;// under lock
uint64_t upid_phyaddress = get_hphys2(cs, uitte.target_upid_addr, MMU_DATA_LOAD, &prot);
struct uintr_upid upid;
cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false);
- if(Debug)printf("qemu: content of upid:\n | status:0x%x | nv:0x%x | ndst:0x%x | 0x%016lx\n", upid.nc.status, upid.nc.nv, upid.nc.ndst, upid.puir);
+ if(Debug && former)qemu_log("qemu: content of upid:\n | status:0x%x | nv:0x%x | ndst:0x%x | 0x%016lx\n", upid.nc.status, upid.nc.nv, upid.nc.ndst, upid.puir);
// tempUPID.PIR[tempUITTE.UV] := 1;
upid.puir |= 1<<uitte.user_vec;
+ bool sendNotify;
//IF tempUPID.SN = tempUPID.ON = 0
- if(upid.nc.status == 0){
+ if((upid.nc.status&0x11) == 0){
//THEN tempUPID.ON := 1; sendNotify := 1;
upid.nc.status |= UPID_ON;
-
+ sendNotify = true;
}else{ // ELSE sendNotify := 0;
-
+ sendNotify = false;
}
//write tempUPID to 16 bytes at tempUITTE.UPIDADDR;// release lock
cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true);
- cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false);
- if(Debug)printf("qemu: data write back in upid:\n | status:0x%x | nv:0x%x | ndst:0x%x | puir 0x%016lx\n---------\n\n", upid.nc.status, upid.nc.nv, upid.nc.ndst, upid.puir);
+ if(Debug && former)qemu_log("qemu: data write back in upid:\n | status:0x%x | nv:0x%x | ndst:0x%x | puir 0x%016lx\n", upid.nc.status, upid.nc.nv, upid.nc.ndst, upid.puir);
+ if(Debug && current){
+ qemu_log("the ndst is %d\n", upid.nc.ndst);
+ DeviceState *dev = cpu_get_current_apic();
+ int id = get_apic_id(dev);
+ qemu_log("the apic id is %d\n", id);
+ qemu_log("sendnotify: %d\n", sendNotify);
+ }
+ if(sendNotify){
+ if(Debug && current){
+ qemu_log("the ndst is %d\n", upid.nc.ndst);
+ }
+ }
-
+ if(Debug)qemu_log("---------\n\n");
}
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 1a4520e82b..5351ed0825 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -864,32 +864,34 @@ static inline target_ulong get_rsp_from_tss(CPUX86State *env, int level)
static bool Debug = true;
+static bool former = false;
void helper_rrnzero(CPUX86State *env){ // 改
if(Debug)qemu_log("------\nrrnzero called handler: 0x%lx rr: 0x%lx\n", env->uintr_handler,env->uintr_rr);
target_ulong temprsp = env->regs[R_ESP];
qemu_log("origin |esp 0x%lx | eip 0x%lx | eflags: 0x%lx\n",env->regs[R_ESP], env->eip, env->eflags);
if(env->uintr_stackadjust &1){ // adjust[0] = 1
env->regs[R_ESP] = env->uintr_stackadjust;
- qemu_log("set statck 0x%lx\n",env->regs[R_ESP]);
+ if(Debug && former)qemu_log("set statck 0x%lx\n",env->regs[R_ESP]);
}else{
env->regs[R_ESP] -= env->uintr_stackadjust;
- qemu_log("move statck 0x%lx\n",env->regs[R_ESP]);
+ if(Debug && former)qemu_log("move statck 0x%lx\n",env->regs[R_ESP]);
}
env->regs[R_ESP] &= ~0xfLL; /* align stack */
target_ulong esp = env->regs[R_ESP];
- qemu_log("align statck 0x%lx\n",env->regs[R_ESP]);
+ if(Debug && former)qemu_log("align statck 0x%lx\n",env->regs[R_ESP]);
PUSHQ(esp, temprsp);
PUSHQ(esp, env->eflags); // PUSHQ(esp, cpu_compute_eflags(env));
PUSHQ(esp, env->eip);
// qemu_log("the uirr is 0x%016lx \n", env->uintr_rr);
PUSHQ(esp, env->uintr_rr & 0x3f); // // 64-bit push; upper 58 bits pushed as 0
- qemu_log("push finish now esp is: 0x%lx |",esp);
+ if(Debug && former)qemu_log("push finish now esp is: 0x%lx |",esp);
env->uintr_rr = 0; // clear rr
env->regs[R_ESP] = esp;
env->eflags &= ~(TF_MASK | RF_MASK);
env->eip = env->uintr_handler;
env->uintr_uif = 0;
- qemu_log("qemu: eip: 0x%lx\n--------\n",env->eip);
+ if(Debug && former)qemu_log("qemu: eip: 0x%lx\n",env->eip);
+ if(Debug)qemu_log("--------\n");
}
bool in_uiret_called = false;
@@ -913,18 +915,7 @@ void helper_uiret(CPUX86State *env){
}
static void helper_clear_eoi(CPUX86State *env){
- CPUState *cs = env_cpu(env);
- int prot;
- uint64_t APICaddress = get_hphys2(cs, APIC_DEFAULT_ADDRESS, MMU_DATA_LOAD, &prot);
- uint64_t EOI;
- uint64_t zero = 0;
- cpu_physical_memory_rw(APICaddress + 0xb0, &EOI, 8, false);
- qemu_log("the physical address of APIC 0x%lx the EOI content: 0x%lx\n", APICaddress,EOI);
- cpu_physical_memory_rw(APICaddress + 0xb0, &zero, 4, true);
DeviceState *dev = cpu_get_current_apic();
- X86CPU *cpu = X86_CPU(cs);
- qemu_log("~ ~ ~ ~ addr of curdev 0x%p | apic state 0x%p \n", dev, cpu->apic_state);
- // APICCommonState *apic = APIC_COMMON(cpu->apic_state);
apic_clear_eoi(dev);
}